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Organization

Qualcomm
Contributors
Deepak Baranwal
Ryan Carey
Michael Defferrard
Trupti Deshpande
Arunava Dutta
Rajeev Jain
Dana Kianfar
Santosh Kumar
Romain Lepert
Sathish Manickam
Srobona Mitra
Vineet Ooramkumarath
Avinash Pandey
Sumant Paranjpe
Sri Sai Pavan Pasumarthi
Markus Peschl
Sayandeep Sanyal
Gokce Sarar
Sudheer Yadapalli
Session Chairs
Puneet Anand
Presentations
Research Panel
3DIC Design Ecosystem – The Cats That Need Herding!
Design
Research Panel
Asleep at the Wheel? In-Cabin Monitoring for Automotive Safety.
AI
EDA
Engineering Track Poster
Early Clock Tree Power Estimation and Correlation at SoC: A Case Study
Back-End Design
Embedded Systems
Front-End Design
IP
Tutorial
How to Write RISC-V PSS Models to Enable Generating Verification Scenarios for RISC-V Platforms
EDA
Research Manuscript
Less is More: Hop-Wise Graph Attention for Scalable and Generalizable Learning on Circuits
AI
AI/ML Algorithms
Work-in-Progress Poster
NeuroSteiner: A Graph Transformer for Wirelength Estimation
AI
Autonomous Systems
Cloud
Design
EDA
Embedded Systems
IP
Security
Front-End Design
Who watches the watchman? FuSa Verification of DCLS configuration through Formal and Static checks
Design
Engineering Tracks
Front-End Design
Sessions
Front-End Design
Static and Formal Verification: Pillars of Modern Design Assurance
Design
Engineering Tracks
Front-End Design