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3DIC prototype design and transient early thermal analysis
Description3DIC design can reduce the length of interconnections and secure gains in power and performance by using multiple dies stacked vertically.
However, the design complexity increases, and more resources are required to modify the design compared to a single die design.
In the early stages of design, we need to be able to quickly and easily prototype design.
Early thermal analysis is an important key to determining the design floorplan, and a high correlation is required after the design is complete.
When we performed thermal analysis on the prototype design and the two designs after the actual P&R was completed, we confirmed that the thermal map showed similar heat maps and hot spots.
When we performed thermal analysis according to the three power scenario steps, the largest error rate between the prototype and the real was 8.34%, which was found near the chip boundary at 5.8s.
We confirmed that the temperature difference was less than 10% and the hot spot trend was very similar.
Event Type
Engineering Track Poster
TimeMonday, June 245:00pm - 6:00pm PDT
LocationLevel 2 Exhibit Hall
Topics
Back-End Design
Embedded Systems
Front-End Design
IP