Presentation
AI-based High Sigma Verification Methodology for Multiple PVT Corners
DescriptionThe paper addresses the challenge of validating Process, Voltage, and Temperature (PVT) corners in semiconductor design, highlighting the increasing complexity of design technology and the impact of process variables and device interference. Recognizing the limitations of traditional Brute-Force methods and the impracticality of validating all PVT corners due to runtime constraints, the paper proposes an AI-based approach. The authors introduce a statistical verification method that combines a scaling method with an Artificial Intelligence (AI)-based Brute-Force accurate method.
Event Type
IP
TimeTuesday, June 251:45pm - 2:00pm PDT
Location2012, 2nd Floor
Engineering Tracks
IP