Presentation
Late Breaking Results: Efficient Built-in Self-Test for Microfluidic Large-Scale Integration (mLSI)
DescriptionControl channels on microfluidic large-scale integration (mLSI) chips are prone to blockage and leakage defects. The state-of-the-art test methods suffer efficiency concerns. In this work, we propose a built-in self-test (BIST) method that drastically improves the test efficiency. Given n to-be-tested control channels, we reduced the number of test patterns for blockage and leakage tests from up to n/2 to 1, and from up to log2(n+1) to up to log2(X(G)+1), respectively, where X(G) denotes the vertex chromatic number of a graph G consisting of n vertices. We fabricated our design and demonstrated the feasibility and efficiency of our method.
Event Type
Late Breaking Results Poster
TimeWednesday, June 266:00pm - 7:00pm PDT
LocationLevel 2 Lobby