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Presenter

Hrithik Sahni
Texas Instruments (India) Pvt. Ltd.
Presentations
Engineering Track Poster
Memory Interface Architectures for Test Time Reduction in Zero DPPM SoCs
Back-End Design
Embedded Systems
Front-End Design
IP
Back-End Design
Reducing Test Dynamic IR and Vmin for Automotive and Industrial Radar SoCs using Power Aware DFT Methodology
Back-End Design
Design
Engineering Tracks