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Presenter

Guojie Luo
Peking University
Presentations
Research Manuscript
G2PM: Performance Modeling for ACAP Architecture with Dual-Tiered Graph Representation Learning
AI
AI/ML Application and Infrastructure
Research Manuscript
PONO: Power Optimization with Near Optimal SMT-based Sub-circuit Generation
EDA
RTL/Logic Level and High-level Synthesis
Research Manuscript
PT-Map: Efficient Program Transformation Optimization for CGRA Mapping
Design
SoC, Heterogeneous, and Reconfigurable Architectures
Work-in-Progress Poster
TACPlace: Ultrafast Thermal-Aware Chiplet Placement under Multi-Power Mode Using Feasibility Seeking
AI
Autonomous Systems
Cloud
Design
EDA
Embedded Systems
IP
Security