Session
Attacks and Defenses at Microarchitecture Level and Beyond
DescriptionThis session consists of papers on the new development of attacks and defenses at microarchitecture level and above. The first paper establishes a formal method to detect microarchitectural timing side-channel attacks. The second paper proposes hardware fuzzing with information flow tracking to address speculative execution leakages. The third paper presents a framework with deep learning (DL) and frame fusion (2F) for the detection and localization of denial of service (DoS) attack on network-on-chips. The last two papers are on the acceleration of the startup procedure of trusted execution environments (TEEs) and the execution of multi-precision integer arithmetic, respectively.
Event TypeResearch Manuscript
TimeThursday, June 2710:30am - 12:00pm PDT
Location3008, 3rd Floor
Security
Hardware Security: Primitives, Architecture, Design & Test
Presentations