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DTSTAMP:20240626T180035Z
LOCATION:3008\, 3rd Floor
DTSTART;TZID=America/Los_Angeles:20240625T161500
DTEND;TZID=America/Los_Angeles:20240625T163000
UID:dac_DAC 2024_sess109_RESEARCH552@linklings.com
SUMMARY:VVIP: Versatile Vertical Indexing Processor for Edge Computing
DESCRIPTION:Research Manuscript\n\nHyungjoon Bae (Korea Advanced Institute
  of Science and Technology (KAIST)), Da Won Kim (Columbia University), and
  Wanyeong Jung (Korea Advanced Institute of Science and Technology (KAIST)
 )\n\nThis paper presents a versatile vertical indexing processor (VVIP) ba
 sed on a single-instruction multiple-data architecture for edge computing.
  In VVIP, the vertical source and destination indexing instructions are cu
 stomized for area-efficient computations. The proposed indexing method reo
 rders data within a processing module by using more registers and data-ste
 ering logic in the calculations. In particular, VVIP supports multibit-ser
 ial multiplication and sparse data operations by leveraging register files
  as lookup tables or accumulators. The VVIP, verified on a vector processo
 r, has an area overhead of less than 2.8%. It exhibits an average computat
 ion rate that is 10.1 times faster than the 1-bit-serial multiplication in
  linear algebra benchmarks, and 1.2 times average performance improvement 
 in unstructured sparse point-wise convolution tasks when compared to conve
 ntional control sequences.\n\nTopic: Design\n\nKeyword: Design of Cyber-ph
 ysical Systems and IoT\n\nSession Chairs: Chen Liu (Intel Corporation) and
  Jakub Szefer (Yale University)
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