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DTSTART:19700308T020000
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DTSTAMP:20240626T180034Z
LOCATION:3003\, 3rd Floor
DTSTART;TZID=America/Los_Angeles:20240625T154500
DTEND;TZID=America/Los_Angeles:20240625T160000
UID:dac_DAC 2024_sess114_RESEARCH458@linklings.com
SUMMARY:EasyACIM: An End-to-End Automated Analog CIM with Synthesizable Ar
 chitecture and Agile Design Space Exploration
DESCRIPTION:Research Manuscript\n\nHaoyi Zhang, Jiahao Song, Xiaohan Gao, 
 Xiyuan Tang, Yibo Lin, Runsheng Wang, and Ru Huang (Peking University)\n\n
 Analog Computing-in-Memory (ACIM) is an emerging architecture to perform e
 fficient AI edge computing. However, current ACIM designs usually have uns
 calable topology and still heavily rely on manual efforts. These drawbacks
  limit the ACIM application scenarios and lead to an undesired time-to-mar
 ket. This work proposes an end-to-end automated ACIM based on a synthesiza
 ble architecture (EasyACIM). With a given array size and customized cell l
 ibrary, EasyACIM can generate layouts for ACIMs with various design specif
 ications end-to-end automatically. Leveraging the multi-objective genetic 
 algorithm (MOGA)-based design space explorer, EasyACIM can obtain high-qua
 lity ACIM solutions based on the proposed synthesizable architecture, targ
 eting versatile application scenarios. The ACIM solutions given by EasyACI
 M have a wide design space and competitive performance compared to the sta
 te-of-the-art (SOTA) ACIMs.\n\nTopic: Design\n\nKeyword: In-memory and Nea
 r-memory Computing Circuits\n\nSession Chairs: Tae Hyoung Kim (Nanyang Tec
 hnological University) and Wenfeng Zhao
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