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UID:dac_DAC 2024_sess118_RESEARCH1627@linklings.com
SUMMARY:SHERLOCK: Scheduling Efficient and Reliable Bulk Bitwise Operation
 s in NVMs
DESCRIPTION:Research Manuscript\n\nHamid Farzaneh and Joao Paulo De Lima (
 Technische Universität Dresden), Ali Nezhadi Khelejani (Karlsruhe Institut
 e of Technology), Asif Ali Khan (Technische Universität Dresden), Mahta Ma
 yahinia and Mehdi Tahoori (Karlsruhe Institute of Technology), and Jeronim
 o Castrillon (Technische Universität Dresden)\n\nBulk bitwise operations a
 re commonplace in application domains such as databases, web search, crypt
 ography, and image processing. \nThe ever-growing volume of data and proce
 ssing demands of these domains often result in high energy consumption and
  latency in conventional systems, mainly due to extensive data movement. \
 nNon-volatile memory (NVM) technologies, such as RRAM, PCM and STT-MRAM, f
 acilitate conducting bulk-bitwise logic operations in-memory (CIM), elimin
 ating the data movement. \nHowever, mapping complex real-world application
 s to these CIM-capable NVMs is non-trivial and can lead to sub-optimal per
 formance. To address this, we present SHERLOCK, a novel mapping and schedu
 ling method tailored to exploit the unique characteristics of these system
 s. SHERLOCK collaboratively optimizes reliability and performance, a previ
 ously overlooked aspect that significantly affects both the correctness an
 d throughput of these systems. Our method also leverages the granularity o
 f CIM operations to reduce the number of write operations and, hence, ener
 gy consumption. Our evaluation on three representative applications from d
 ifferent domains shows that SHERLOCK outperforms the state-of-the-art in t
 erms of performance and energy consumption.\n\nTopic: Design\n\nKeyword: I
 n-memory and Near-memory Computing Architectures, Applications and Systems
 \n\nSession Chairs: Seokhyeong Kang (Pohang University of Science and Tech
 nology (POSTECH)) and Giacomo Pedretti (Hewlett Packard Enterprise)
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