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DTSTAMP:20240626T180033Z
LOCATION:3004\, 3rd Floor
DTSTART;TZID=America/Los_Angeles:20240626T165500
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UID:dac_DAC 2024_sess119_RESEARCH1157@linklings.com
SUMMARY:Towards Efficient SRAM-PIM Architecture Design by Exploiting Unstr
 uctured Bit-Level Sparsity
DESCRIPTION:Research Manuscript\n\nCenlin Duan, Jianlei Yang, Yiou Wang, Y
 ikun Wang, Yingjie Qi, and Xiaolin He (Beihang University); Bonan Yan (Pek
 ing University); and Xueyan Wang, Xiaotao Jia, and Weisheng Zhao (Beihang 
 University)\n\nBit-level sparsity in neural network models harbors immense
  untapped potential. \nEliminating redundant calculations of randomly dist
 ributed zero-bits significantly boosts computational efficiency. \nYet, tr
 aditional digital SRAM-PIM architecture, limited by rigid crossbar archite
 cture, struggles to effectively exploit this unstructured sparsity. \nTo a
 ddress this challenge, we propose Dyadic Block PIM (DB-PIM), a novel algor
 ithm-architecture co-design framework. \nIt preserves the random distribut
 ion of non-zero bits to maintain accuracy while restricting the number of 
 non-zero bits in each weight of the filter to improve regularity.\nDB-PIM 
 improves both performance and energy efficiency, achieving a remarkable sp
 eedup of up to 6.53x and energy savings of 77.50%.\n\nTopic: Design\n\nKey
 word: In-memory and Near-memory Computing Architectures, Applications and 
 Systems\n\nSession Chairs: Peipei Zhou (University of Pittsburgh) and Xueq
 ing Li (Tsinghua University)
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