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DTSTAMP:20240626T180034Z
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DTSTART;TZID=America/Los_Angeles:20240627T134500
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UID:dac_DAC 2024_sess150_RESEARCH1360@linklings.com
SUMMARY:TAPMM:A Traffic-Aware Page Mapping Method for Multi-level NUMA Sys
 tems
DESCRIPTION:Research Manuscript\n\nFengkun Dong, Guoqing Xiao, Haotian Wan
 g, Yikun Hu, Kenli Li, and Wangdong Yang (Hunan University)\n\nWith the de
 velopment of chiplet technology, the architecture of Non-Uniform Memory Ac
 cess (NUMA) has become increasingly intricate. The placement of memory pag
 e significantly influences application performance in NUMA systems. We fou
 nd that memory access bottlenecks occur between high-level NUMA domains co
 nsisting of multiple chiplets. In this paper, we introduce a Traffic-Aware
  Page Mapping Method (TAPMM) designed for multi-level NUMA systems. TAPMM 
 conceptualizes the multi-level NUMA system as a memory access tree, utiliz
 ing hardware performance events to be aware of system traffic and identify
  the optimal page mapping method for bandwidth efficiency. Our experiments
  demonstrate that TAPMM achieves a speedup of up to 2.12 times on a real c
 ommodity machine compared to existing optimization tools.\n\nTopic: Embedd
 ed Systems\n\nKeyword: Embedded Memory and Storage Systems\n\nSession Chai
 r: Filippo Carloni (Politecnico di Milano)
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