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DTSTAMP:20240626T180035Z
LOCATION:3012\, 3rd Floor
DTSTART;TZID=America/Los_Angeles:20240626T153000
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UID:dac_DAC 2024_sess154_RESEARCH542@linklings.com
SUMMARY:DH-TRNG: A Dynamic Hybrid TRNG with Ultra-High Throughput and Area
 -Energy Efficiency
DESCRIPTION:Research Manuscript\n\nYuan Zhang, Kuncai Zhong, and Jiliang Z
 hang (Hunan University)\n\nAs a vital security primitive, the true random 
 number generator (TRNG) is a mandatory component to build roots of trust f
 or any encryption system. However, existing TRNGs suffer from bottlenecks 
 of low throughput and high area-energy consumption. In this work, we propo
 se DH-TRNG, a dynamic hybrid TRNG circuitry architecture with ultra-high t
 hroughput and area-energy efficiency. Our DH-TRNG exhibits portability to 
 distinct process FPGAs and passes both NIST and AIS-31 tests without any p
 ost-processing. The experiments show it incurs only 8 slices with the high
 est throughput of 670 Mbps and 620 Mbps on Xilinx Virtex-6 and Artix-7, re
 spectively. Compared to the state-of-the-art TRNGs, our proposed design ha
 s the highest Throughput/(Slices·Power) with 2.63× increase.\n\nTopic: Sec
 urity\n\nKeyword: Hardware Security: Primitives, Architecture, Design & Te
 st\n\nSession Chair: Dean Sullivan (University of New Hampshire)
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