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DTSTAMP:20240626T180002Z
LOCATION:3001\, 3rd Floor
DTSTART;TZID=America/Los_Angeles:20240626T153000
DTEND;TZID=America/Los_Angeles:20240626T173000
UID:dac_DAC 2024_sess161@linklings.com
SUMMARY:Modeling, Software, and Architecture Just Got Smarter
DESCRIPTION:Research Manuscript\n\nThis section presents new developments 
 in embedded modeling, software and architecture. The first paper develops 
 a deep-to-shallow transformable neural architecture search; the second one
  focuses on efficient code generation for data-intensive Simulink models; 
 the third paper presents a framework of translating regular expressions. T
 he fourth paper investigates a dynamic mechanism for reducing control flow
  divergence in GPUs. The next paper investigates methods to boost the effi
 ciency of data deduplication; the sixth one develops code optimization sch
 emes to accelerate stencil code kernels; the seventh paper investigates a 
 novel approach to decompose tasks on intermittent computing systems; and t
 he last one proposes a light-weighted idle time stealing strategy.\n\nALVE
 ARE: a Domain-Specific Framework for Regular Expressions\n\nRegular Expres
 sion (RE) matching enables the identification of patterns in datastream of
  heterogeneous fields ranging from proteomics to computer security. These 
 scenarios require massive data analysis that, combined with the high data 
 dependency of the REs, leads to long computational times and hig...\n\n\nF
 ilippo Carloni, Davide Conficconi, and Marco D. Santambrogio (Politecnico 
 di Milano)\n---------------------\nHow to Steal CPU Idle Time When Synchro
 nous I/O Mode Becomes Promising\n\nThe advent of ultra-low-latency storage
  devices has narrowed the performance gap between storage and CPU in compu
 ting platforms, facilitating synchronous I/O adoption. Yet, this approach 
 introduces substantial busy waiting time and underutilizes computing units
 . To address this, we propose a light-w...\n\n\nChun-Feng Wu (National Yan
 g Ming Chiao Tung University), Yuan-Hao Chang (Academia Sinica), Ming-Chan
 g Yang (The Chinese University of Hong Kong), and Tei-Wei Kuo (National Ta
 iwan University)\n---------------------\nDouble-Win NAS: Towards Deep-to-S
 hallow Transformable Neural Architecture Search for Intelligent Embedded S
 ystems\n\nThanks to the evolving network depth, convolutional neural netwo
 rks (CNNs) have achieved impressive performance across various intelligent
  embedded scenarios towards embedded intelligence. Nonetheless, this trend
  also leads to degraded hardware efficiency as the network evolves deeper 
 and deeper. In...\n\n\nXiangzhong Luo (Nanyang Technological University); 
 Di Liu (Norwegian University of Science and Technology); and Hao Kong, Shu
 o Huai, and Weichen Liu (Nanyang Technological University)\n--------------
 -------\nControl Flow Divergence Optimization by Exploiting Tensor Cores\n
 \nKernels are scheduled on Graphics Processing Units (GPUs) in the granula
 rity of warp, a bunch of concurrently executing threads. When executing ke
 rnels with conditional branches, threads within a warp may execute differe
 nt branches sequentially, resulting in a considerable utilization loss and
  unpre...\n\n\nWeiguang Pang (Qilu University of Technology), Xu Jiang (Un
 iversity of Electronic Science and Technology of China), Songran Liu (Nort
 heastern University), Lei Qiao (Beijing Institute of Control Engineering),
  kexue fu and longxiang Gao (Qilu University of Technology), and Wang Yi (
 Uppsala University)\n---------------------\nFinerDedup: Sifting Fingerprin
 ts for Efficient Data Deduplication on Mobile Devices\n\nData deduplicatio
 n is promised to extend the lifetime and capacity of storage on mobile dev
 ices. However, existing data deduplication works show high memory consumpt
 ion and indexing costs for\nmaintaining a fingerprint for each data block,
  especially when the duplicate ratio of data blocks on mobile ...\n\n\nXia
 nzhang Chen, Xingjie Zhou, Wei Li, Xi Yu, Duo Liu, Yujuan Tan, and Ao Ren 
 (Chongqing University)\n---------------------\nSARIS: Accelerating Stencil
  Computations on Energy-Efficient RISC-V Compute Clusters with Indirect St
 ream Registers\n\nStencil codes are performance-critical in many compute-i
 ntensive applications, but suffer from significant address calculation and
  irregular memory access overheads. This work presents SARIS, a general an
 d highly flexible methodology for stencil acceleration using register-mapp
 ed indirect streams. W...\n\n\nPaul Scheffler and Luca Colagrande (ETH Zür
 ich) and Luca Benini (Università di Bologna)\n---------------------\nEffic
 ient Code Generation for Data-Intensive Simulink Models via Redundancy Eli
 mination\n\nSimulink has emerged as the fundamental infrastructure that su
 pports modeling, simulation, verification, and code generation for embedde
 d software development. To improve the performance of the code generated f
 rom Simulink models, state-of-the-art code generators employ various optim
 ization techniqu...\n\n\nZehong Yu, Zhuo Su, and Yu Jiang (Tsinghua Univer
 sity); Aiguo Cui (Huawei); and Rui Wang (Capital Normal University)\n-----
 ----------------\nCache-aware Task Decomposition for Efficient Intermitten
 t Computing Systems\n\nEnergy harvesting offers a scalable and cost-effect
 ive power solution for IoT devices, but it introduces the challenge of fre
 quent and unpredictable power failures due to the unstable environment. \n
 To address this, intermittent computing has been proposed, which periodica
 lly backs up the system stat...\n\n\nShuo Xu, Wei Zhang, Mengying Zhao, Zi
 meng Zhou, and Lei Ju (Shandong University)\n\nTopic: Embedded Systems\n\n
 Keyword: Embedded Software
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