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UID:dac_DAC 2024_sess168_RESEARCH677@linklings.com
SUMMARY:DACPara: A Divide-and-Conquer Parallel Approach for High-Quality L
 ogic Rewriting in Large-Scale Circuits
DESCRIPTION:Research Manuscript\n\nNanjiang Qu, Cong Tian, and Zhenhua Dua
 n (Xidian University)\n\nLogic rewriting is a critical and time-consuming 
 task in logic synthesis, which determines the area and delay of the synthe
 sized circuit. However, existing parallel solutions for this task suffer f
 rom limitations in terms of runtime or quality in large-scale complex circ
 uits. In this paper, we propose a divide-and-conquer parallel approach nam
 ely DACPara for high-quality logic rewriting in large-scale circuits. Spec
 ifically, after nodes in AIG are divided in each level, dynamic global inf
 ormation is considered to divide and conquer rewriting into three stages f
 or parallel processing. Experiments show that DACPara using 40 CPU physica
 l cores can be 34.36x and 1.96x faster than logic rewriting in ABC and the
  state-of-the-art CPU parallel method on large benchmarks, respectively, w
 ith extremely comparable quality of result. Also, for large-scale complex 
 benchmarks, compared with state-of-the-art GPU accelerated method ours can
  achieve 1.1% quality improvement.\n\nTopic: EDA\n\nKeyword: RTL/Logic Lev
 el and High-level Synthesis\n\nSession Chairs: Giovanni De Micheli (EPFL) 
 and Cunxi Yu (University of Maryland)
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