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DTSTAMP:20240626T180034Z
LOCATION:2008\, 2nd Floor
DTSTART;TZID=America/Los_Angeles:20240624T133000
DTEND;TZID=America/Los_Angeles:20240624T134500
UID:dac_DAC 2024_sess184_BED037@linklings.com
SUMMARY:A Novel Solution for Fast and Efficient Custom Bus Routing with Us
 er-defined Reference Wire and Combination of Segmented Bus Option
DESCRIPTION:Back-End Design\n\nSUNGSIK PARK (Samsung) and Keunbong Lee (Ca
 dence Design Systems, Inc.)\n\nAnalog/Mixed Signal IP/Product have large n
 umber of custom bus routings which have been routed manually to meet many 
 requirements (various width/space/layer for matching, IR drop, EM, Noise, 
 etc.). This causes TAT increase continuously by the complexity of advanced
  node DRC, product size increase, design change, lack of automated solutio
 ns. In this paper, we analyzed challenges for custom bus automation and pr
 oposed a new custom bus routing solution which enables the fast generation
  of large number of various bus routings with quality by copying the user 
 defined reference wire information and applying segmented combination of p
 re-defined bus options. The proposed solution is developed under collabora
 tion of SLSI and Cadence and achieved 63% of TAT reduction at pilot test.\
 n\nTopic: Back-End Design, Design, Engineering Tracks\n\nSession Chair: Pa
 tricia Fong (Marvell Semiconductor)
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