BEGIN:VCALENDAR
VERSION:2.0
PRODID:Linklings LLC
BEGIN:VTIMEZONE
TZID:America/Los_Angeles
X-LIC-LOCATION:America/Los_Angeles
BEGIN:DAYLIGHT
TZOFFSETFROM:-0800
TZOFFSETTO:-0700
TZNAME:PDT
DTSTART:19700308T020000
RRULE:FREQ=YEARLY;BYMONTH=3;BYDAY=2SU
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0700
TZOFFSETTO:-0800
TZNAME:PST
DTSTART:19701101T020000
RRULE:FREQ=YEARLY;BYMONTH=11;BYDAY=1SU
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTAMP:20240626T180034Z
LOCATION:2010\, 2nd Floor
DTSTART;TZID=America/Los_Angeles:20240625T103000
DTEND;TZID=America/Los_Angeles:20240625T104500
UID:dac_DAC 2024_sess205_IP070@linklings.com
SUMMARY:Advancing Power Signoff for High Speed ΔΣADC
DESCRIPTION:IP\n\nVaibhav Garg, Paras Garg, and Atul Bhargava (STMicroelec
 tronics) and Prayes Jain (Cadence Design Systems, Inc.)\n\nContinuous Time
  Delta Sigma Modulators (CTDSMs) are critical part of various RF receiver 
 chains.  These ADCs should be able to accommodate wider signal bandwidths 
 with high dynamic range. This requires higher sampling rate leading to inc
 reased power consumption. Thereby, making successful power and signal inte
 grity sign-off a challenging task.\n\nIn EMIR analysis, a circuit is simul
 ated together with the parasitic resistor and capacitor network which mode
 ls the IR drop and Electromigration (EM) effects for both power and signal
  nets. Advanced node designs have more complex EM rules and with exponenti
 al increase in parasitics (RCs) for such kind of designs, the EM simulatio
 n becomes more costly. \n\nTo address these challenges, we have used Virtu
 oso-ADE and SpectreX-EMIR solution which handles high-capacity designs and
  provides exceptional performance. With this flow, a new two-stage iterate
 d method of Spectre-X is used for EMIR analysis to achieve golden accuracy
  with high performance gain. \n\nIn this paper, by using this new two stag
 e iterated method of Spectre-X EMIR, we have achieved close to golden accu
 racy of direct method (single stage), accelerating EMIR signoff analysis c
 losure by 2.5X performance gain. Seamless integration of Voltus-Fi solutio
 n with easy visualization and postprocessing features of ADE, provides pro
 ductivity gain of 30%.\n\nTopic: Engineering Tracks, IP\n\nSession Chair: 
 Nanditha Rao (Indian Institute of Information Technology)
END:VEVENT
END:VCALENDAR