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DTSTAMP:20240626T180034Z
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UID:dac_DAC 2024_sess232_ETPOST117@linklings.com
SUMMARY:Microsoft's Comprehensive IP Handoff Flow
DESCRIPTION:Engineering Track Poster\n\nMartin Sanchez (Microsoft) and Sid
 dharth Ravikumar and Mary Rayburn (Siemens)\n\nMicrosoft addresses diverse
  IP challenges by prioritizing quality control for internal design teams, 
 resolving handoff complexities, and managing 3rd party IPs with format inc
 onsistencies. They emphasize early quality checks in design, acknowledging
  the rising cost of addressing IP issues later in the process, especially 
 for intricate custom chips like Cobalt 100 and Maia 100.  \n\nTo resolve t
 hese challenges, Microsoft has collaborated with Siemens to build and depl
 oy a comprehensive IP QA framework covering database integrity, layout fun
 ctionality equivalence, and validation of timing, power, noise parameters,
  and version-to-version IP QA. This framework integrates Siemens' Solido I
 P Validation into its Microsoft's CAD infrastructure.  \n\nThis paper disc
 usses how Microsoft's IP handoff flow automates and streamlines the entire
  process. \nBy catching potential issues much earlier in the design flow, 
 the handoff flow has demonstrated remarkable results, saving approximately
  2 weeks of engineering time. This not only contributes to substantial cos
 t savings but also prevents the need for costly ECOs, leading to more pred
 ictable tapeout schedules.\n\nTopic: Back-End Design, Embedded Systems, Fr
 ont-End Design, IP
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