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BEGIN:VEVENT
DTSTAMP:20240626T180033Z
LOCATION:Level 2 Exhibit Hall
DTSTART;TZID=America/Los_Angeles:20240625T170000
DTEND;TZID=America/Los_Angeles:20240625T180000
UID:dac_DAC 2024_sess233_ETPOST057@linklings.com
SUMMARY:A module based automation for AXI performance monitoring, performa
 nce extraction and protocol checking.
DESCRIPTION:Engineering Track Poster\n\nNaveen Srivastava, Amresh Lenka, a
 nd Sekhar Dangudubiyyam (Samsung)\n\nIn this paper we would like to propos
 e an easy module bind based automation for the AXI protocol violation chec
 k and extraction of the performance from any AXI-3 based bus. The automati
 on infrastructure proposed, reduces the manual effort, time and human erro
 r in extracting the performance indices. It also flags any AXI protocol vi
 olations in the design. The major capabilities of the infrastructure inclu
 de reporting of any AXI protocol violations, per transaction latency, byte
  transferred, average latency, peak latency, total accumulated latency, av
 erage outstanding transactions, number of address requests, number of data
  requests and net bandwidth. The infrastructure also generates independent
  RTL hierarchical performance summary log with the previously mentioned pa
 rameters which enables user to get the performance info without any wave. 
 The infrastructure was tested on various AXI-3 masters with different addr
 ess, data and ID width which resulted in reduction in the design verificat
 ion time, and a higher confidence on the quality of the design. Producing 
 a performance and protocol check report is effortless using this infrastru
 cture with very minimal input. The infrastructure, being parameterized and
  bind-based, exhibit significant reusability, whether at the SOC or IP lev
 el.\n\nTopic: Back-End Design, Embedded Systems, Front-End Design, IP
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