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DTSTAMP:20240626T180033Z
LOCATION:Level 2 Exhibit Hall
DTSTART;TZID=America/Los_Angeles:20240625T170000
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UID:dac_DAC 2024_sess233_ETPOST066@linklings.com
SUMMARY:Enhancing Analog Mixed-Signal (AMS) Verification:  Advanced Method
 s for Runtime and Scope Optimization
DESCRIPTION:Engineering Track Poster\n\nAadhar Sharma, Avinash Chaudhary, 
 Sooraj Sekhar, and Lakshmanan Balasubramanian (Texas Instruments (India) P
 vt. Ltd.) and Gaurav Varshney (Texas Instruments)\n\nThis paper presents i
 nnovative approaches to reduce the runtime of complex System on Chip (SoC)
  verification, particularly in the context of Analog Mixed-Signal (AMS) co
 -simulation. The methodologies discussed can be applied to improve the sco
 pe of AMS simulations and improve the quality and coverage. The primary fo
 cus is on a SystemVerilog EEnet methodology tailored for Analog Test Bus (
 ATB) test cases, aimed at shrinking the scope of AMS co-simulation and enh
 ancing Analog Behavioral Models (ABMOD) for Digital Mixed-Signal (DMS) tes
 t cases.\n\nTopic: Back-End Design, Embedded Systems, Front-End Design, IP
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