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DTSTAMP:20240626T180033Z
LOCATION:Level 2 Exhibit Hall
DTSTART;TZID=America/Los_Angeles:20240625T170000
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UID:dac_DAC 2024_sess233_ETPOST095@linklings.com
SUMMARY:Empowering CDC analysis methodology with root cause analysis
DESCRIPTION:Engineering Track Poster\n\nAbdul Moyeen and Manish Bhati (Sie
 mens)\n\nCDC static verification tool with machine learning (ML) capabilit
 y helps engineers with apt root cause analysis (RCA) to bring down the noi
 se in results. An improper constrained design may leak a bug into silicon,
  or an over constrained design may not lead to verification closure. Often
  it is required in static methodologies to have an automated data analysis
  or ML solution which can detect the issues in the CDC setup stage of the 
 design. Using the causality analysis, EDA tools suggest better constraints
  to report real issues and eliminate noise.\n\nThis paper investigates how
  improper or missed constraints can affect the CDC analysis results and su
 bsequently devises a methodology for an effective use of ML feature in for
 m of causality reports. Firstly, RCA can start from fine tuning the clock 
 constraints with the suggested constraints for the clock tree to maintain 
 an optimal pessimism in CDC analysis. Secondly, engineers should focus on 
 other constraints like stables, constants etc., on data paths as suggested
  in RCA. Lastly, engineers should investigate other miscellaneous constrai
 nts through causality reports to reduce noise. Thus, RCA should be done in
  a progressive iterative manner for an effective CDC analysis with real is
 sues.\n\nTopic: Back-End Design, Embedded Systems, Front-End Design, IP
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