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BEGIN:VEVENT
DTSTAMP:20240626T180033Z
LOCATION:Level 2 Exhibit Hall
DTSTART;TZID=America/Los_Angeles:20240625T170000
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UID:dac_DAC 2024_sess233_ETPOST112@linklings.com
SUMMARY:Challenges and Improvements in StandardCell OpenAccess Content for
  Analog Design
DESCRIPTION:Engineering Track Poster\n\nAnuradha Ray, Frederic Avellaneda,
  Stephan Weber, and Ashish Kumar (STMicroelectronics)\n\nDesigning an anal
 og block involves more human intervention and expertise compared to digita
 l counterpart. Analog design flow is still strongly manual, which leads to
  a time-consuming and error-prone process. This paper firstly reviews the 
 difficulties faced by analog designers in handmade schematic design. This 
 is followed by feasibility analysis and preliminary evaluation to implemen
 t various proposals keeping in mind backward compatibility. The improvemen
 t point discussed in this paper will help analog designer design and debug
  blocks in a more efficient manner.\n\nTopic: Back-End Design, Embedded Sy
 stems, Front-End Design, IP
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