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DTSTAMP:20240626T180034Z
LOCATION:Level 2 Exhibit Hall
DTSTART;TZID=America/Los_Angeles:20240625T170000
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UID:dac_DAC 2024_sess233_ETPOST158@linklings.com
SUMMARY:Analysis of Rare Failure Events: An Improved Scaled-Sigma Sampling
  Method
DESCRIPTION:Engineering Track Poster\n\nNing Lu (IBM)\n\nHigh sigma analys
 is is an important topic in circuit design and analysis area, which predic
 ts the probability of rare circuit/device failure events in VLSI circuits,
  such as in SRAM arrays. There are EDA start-ups specifically dedicated to
  address rare failure event problems, such as Solido, MunEDA, etc. The imp
 ortance sampling, the tail sampling methods, etc. have been used in this a
 rea for many years. More recently, the Scaled Sigma Sampling (SSS) method 
 by Prof. X. Li, et al. at Carnegie Mellon advanced the analysis of rare fa
 ilure events greatly. The SSS method is an extrapolation method. The EDA i
 ndustry has welcomed the SSS method. However, we have not seen a compariso
 n of the SSS method against a set of known and exact failure probabilities
 . Without such a benchmark comparison, the validity range and the expected
  accuracy of the SSS method are not very clear. In this work, we wish to f
 ill this gap. In this work, we also present an improved SSS method.\n\nTop
 ic: Back-End Design, Embedded Systems, Front-End Design, IP
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