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DTSTAMP:20240626T180033Z
LOCATION:Level 2 Exhibit Hall
DTSTART;TZID=America/Los_Angeles:20240625T170000
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UID:dac_DAC 2024_sess233_ETPOST172@linklings.com
SUMMARY:Resolving the seed promotion due to device layers derivation
DESCRIPTION:Engineering Track Poster\n\nPrachi Mrudula and Atul Bhargava (
 STMicroelectronics) and GAZAL SINGLA (Siemens)\n\nSeed promotion can be an
  issue during Hierarchical LVS leading to LVS incorrect results. The debug
 ging methodology for finding the root cause behind it involves a lot of tr
 ials. One of them being the way layers are derived using node-preserving l
 ayer operations. In this paper we show the right methodology to debug seed
  promotion cases.\n\nTopic: Back-End Design, Embedded Systems, Front-End D
 esign, IP
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