BEGIN:VCALENDAR
VERSION:2.0
PRODID:Linklings LLC
BEGIN:VTIMEZONE
TZID:America/Los_Angeles
X-LIC-LOCATION:America/Los_Angeles
BEGIN:DAYLIGHT
TZOFFSETFROM:-0800
TZOFFSETTO:-0700
TZNAME:PDT
DTSTART:19700308T020000
RRULE:FREQ=YEARLY;BYMONTH=3;BYDAY=2SU
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0700
TZOFFSETTO:-0800
TZNAME:PST
DTSTART:19701101T020000
RRULE:FREQ=YEARLY;BYMONTH=11;BYDAY=1SU
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTAMP:20240626T180034Z
LOCATION:Level 2 Exhibit Hall
DTSTART;TZID=America/Los_Angeles:20240625T170000
DTEND;TZID=America/Los_Angeles:20240625T180000
UID:dac_DAC 2024_sess233_ETPOST200@linklings.com
SUMMARY:Tapeout Data Preservation and automatic archival tagging for Optim
 al Disk Space Management
DESCRIPTION:Engineering Track Poster\n\nYamini Ravishankar (Marvell)\n\nDe
 sign data management is an important concern from a chip design perspectiv
 e due to the enormous amount of data generated through the design flow. Th
 is data, if not effectively managed can lead to disks running out of space
  at critical times in a project, causing run crashes and increased turnaro
 und time. Most engineers do not proactively clean up data and is almost al
 ways done in a haphazard manner at a choke point where disks complain of s
 pace shortage. As projects progress, it becomes a time-consuming chore to 
 recognize and delete older experiments, sometimes leading to accidental de
 letion of data that led to the final design. Data is expensive – from spac
 e, cost and power perspective, and all of the potentially unnecessary data
  adds upto business operating costs. \n\nThe proposal is a utility for aut
 omatic data archival tagging that would lead to Optimal Disk Space Managem
 ent and Tapeout Data Preservation to minimize each chip's design developme
 nt footprint with minimal effort from end-user. Analysis on a Reticle-size
 d Data-center Accelerator chip determined that only 20% or less of the cur
 rent 1.8PB of data used is necessary for Tapeout Data Archival. With futur
 e enhancements, this number could go as less as 10-15%, which is significa
 nt.\n\nTopic: Back-End Design, Embedded Systems, Front-End Design, IP
END:VEVENT
END:VCALENDAR