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BEGIN:VEVENT
DTSTAMP:20240626T180033Z
LOCATION:Level 2 Exhibit Hall
DTSTART;TZID=America/Los_Angeles:20240625T170000
DTEND;TZID=America/Los_Angeles:20240625T180000
UID:dac_DAC 2024_sess233_ETPOST211@linklings.com
SUMMARY:A PVT-robust Design with Electronic/Photonic Co-simulation Engine 
 for Microring-based DWDM 3-D Silicon Photonics
DESCRIPTION:Engineering Track Poster\n\nChaerin Hong, Luca Ramini, and Mar
 co Fiorentino (Hewlett Packard Enterprise); Ahsan Alam and Zeqin Lu (Ansys
 ); and Raymond Beausoleil (Hewlett Packard Enterprise)\n\nHewlett Packard 
 Labs has been researching high-speed low-power dense wavelength division m
 ultiplexing (DWDM) Silicon Photonics (SiPh) system for post-exascale high-
 performance computing system. We propose a process/temperature/voltage (PV
 T) variation analysis for SiPh designs leveraging electronic-photonic co-d
 esign engine. Especially, as electronics' corner extremes distort signal i
 ntegrity of the SiPh link in the voltage and time domain. Thus, we exploit
  the novel adjustable tuning techniques on electronic transceiver to impro
 ve system performance.\n\nTopic: Back-End Design, Embedded Systems, Front-
 End Design, IP
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