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DTSTAMP:20240626T180033Z
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UID:dac_DAC 2024_sess236_RESEARCH1917@linklings.com
SUMMARY:Quantifying the Energy Efficiency Benefits of Monolithic 3D Refres
 hless Embedded-DRAM
DESCRIPTION:Work-in-Progress Poster\n\nDavid Kong and Shvetank Prakash (Ha
 rvard University), Jedrzej Kufel (Pragmatic), Georgios Kyriazidis and Yasm
 ine Omri (Harvard University), David Verity and Emre Ozer (Pragmatic), and
  Vijay Janapa Reddi and Gage Hills (Harvard University)\n\nFuture energy-e
 fficient computing systems require new memory designs to overcome the chal
 lenges of transistor scaling. This paper presents a design space explorati
 on methodology for rapid analysis of heterogeneous monolithic 3D integrati
 on for on-chip dynamic random-access memory. We develop a model for memory
  analysis validated with tape-out measurements and profile software applic
 ations with different memory access patterns. Using a system comprising si
 licon, carbon-nanotube and indium-gallium-zinc-oxide field effect transist
 ors, we show that such designs can achieve 2.8x and 291x improvements in e
 nergy-delay-product in addition to 50% and 33% reductions in bit-cell area
  compared to silicon-based 6T-SRAM and 3T-eDRAM for embedded applications.
 \n\nTopic: AI, Autonomous Systems, Cloud, Design, EDA, Embedded Systems, I
 P, Security
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