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DTSTAMP:20240626T180035Z
LOCATION:Level 2 Lobby
DTSTART;TZID=America/Los_Angeles:20240626T180000
DTEND;TZID=America/Los_Angeles:20240626T190000
UID:dac_DAC 2024_sess237_RESEARCH1379@linklings.com
SUMMARY:Eliminate control divergence in SpMV via in-SRAM reduction
DESCRIPTION:Work-in-Progress Poster\n\nZhang Dunbo, Jia Chaoyang, Li Shen,
  and Lu Kai (National University of Defense Technology)\n\nSpMV is a criti
 cal kernels in multiple application domains. The performance of SpMV on SI
 MD devices suffers from control divergences greatly. This paper proposes a
 n In-SRAM Computing based SpMV optimization framework. We divide the SpMV 
 into two stages: a compute-intensive and a control-intensive stage. The fi
 rst stage has been efficently accelerated on most current SIMD devices. To
  optimize the second stage, we convert the control divergences to the memo
 ry divergences, and utilize the feature of multi-bank SRAM to eliminate th
 e memory divergences' overheads. Experimental results indicate that our so
 lution achieves significant performance speedups over the highly optimized
  vector SpMV kernels.\n\nTopic: AI, Autonomous Systems, Cloud, Design, EDA
 , Embedded Systems, IP, Security
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