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UID:dac_DAC 2024_sess237_RESEARCH563@linklings.com
SUMMARY:DATIS: DRAM Architecture and Technology Integrated Simulation
DESCRIPTION:Work-in-Progress Poster\n\nZheng Qiao, Chen Zhang, Zhuoshan Zh
 ou, Yong Liu, and Zhigang Ji (Shanghai Jiao Tong University) and Ru Huang 
 (Peking University)\n\nRecent advances in DRAM technologies and large-data
 set applications in data centers make both academia and industrial researc
 hers eager to explore DRAM's novel usage and cross-disciplinary DTCO (desi
 gn and technology co-design) spaces, as illustrated by recent studies of t
 he PIM or RowHammer effect etc. This evolving landscape has created a pres
 sing need for systematic testing and validation of those emerging DTCO stu
 dies. To meet this demand, we introduce DATIS (DRAM Architecture and Techn
 ology Integrated Simulator), a tool that effectively connects architectura
 l design and the complexities of DRAM technology. DATIS addresses two crit
 ical challenges: abstracting technology intricacies and establishing conne
 ctions between architectural activities and device-level process structure
 s. This versatile tool empowers researchers to unlock the latent capabilit
 ies of DRAM and provides manufacturers with a platform to experiment with 
 new processes and architecture co-design. We build DATIS upon Ramulator, a
  well-known open source DRAM simulator for architecture-level modeling, an
 d thus can support a wide range of DRAM specifications, including DDRx, LP
 DDR5, GDDR6, and HBM2\&3 etc. Our experiments demonstrates DATIS's efficac
 y and precision through three compelling case studies, addressing pivotal 
 facets of DRAM technology, including storage, reliability, and computation
 .\n\nTopic: AI, Autonomous Systems, Cloud, Design, EDA, Embedded Systems, 
 IP, Security
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