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DTSTAMP:20240626T180035Z
LOCATION:Exhibitor Forum\, Level 1 Exhibit Hall
DTSTART;TZID=America/Los_Angeles:20240624T153000
DTEND;TZID=America/Los_Angeles:20240624T160000
UID:dac_DAC 2024_sess241_EF103@linklings.com
SUMMARY:Transforming Semiconductor Designs using SystemC based Shift-Left 
 methodologies
DESCRIPTION:Exhibitor Forum\n\nUmesh Sisodia and Rameez Syed (CircuitSutra
  Technologies)\n\nSince the inception of the semiconductor industry in the
  1950s, there have been continuous advancements on multiple fronts. Semico
 nductor chips are becoming more and more powerful & complex.\n\nDesigning 
 such complex chips is extremely difficult, costly and error prone. Design 
 methodologies have also evolved to keep the pace with growing complexity. 
 Historically this evolution came in the form of raising the abstraction of
  chip design: component level to gate level, and further to RTL.\n\nShift-
 left methodology allows the identification and resolution of flaws early i
 n the design cycle. Fast simulation models allow early software developmen
 t in parallel to hardware design. It is feasible to engage with the potent
 ial customers and validate the SoC architecture with the real customer wor
 kloads quite early in the cycle. These methodologies significantly reduce 
 the Cost & Time to market. Overall it enhances the probability of success 
 for a new SoC.\n\nTwo key trends in the industry today are, usage of chips
  for AI applications, and emergence of an open source processor architectu
 re RISC-V ISA. Effective use of the ESL methodologies is necessary for the
  success of these trends.\n\nThe presentation will cover the virtual proto
 type of Core-V-MCU, an open source System on Chip from OpenHW group. This 
 SoC has a RISC-V CPU core, an embedded FPGA, on chip SRAM, and a rich set 
 of peripherals.
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