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DTSTAMP:20240626T180033Z
LOCATION:Level 2 Lobby
DTSTART;TZID=America/Los_Angeles:20240626T180000
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UID:dac_DAC 2024_sess256_LBR111@linklings.com
SUMMARY:Late Breaking Results: Routability-Driven FPGA Macro Placement Con
 sidering Complex Cascade Shape and Region Constraints
DESCRIPTION:Late Breaking Results Poster\n\nHao Gu, Jian Gu, Keyu Peng, Ju
 n Yang, and Ziran Zhu (Southeast University)\n\nField-programmable gate ar
 ray (FPGA) macro placement holds a crucial role within the FPGA physical d
 esign flow since it substantially influences the subsequent stages of cell
  placement and routing. In this paper, we propose an effective and efficie
 nt routability-driven macro placement algorithm for modern FPGAs with casc
 ade shape and region constraints. To reserve adequate space for cell place
 ment and guarantee routability, we first develop a routability-driven mixe
 d-size analytical global placement (GP) that evenly distributes both macro
 s and cells while considering cascade shape and region constraints. Then, 
 we propose an integer linear programming (ILP)-based cascade shape legaliz
 ation (LG) followed by matching-based macro legalization to remove macro o
 verlaps while satisfying the region constraints. Finally, a routability-dr
 iven detailed macro placement is proposed to refine the solution. Compared
  with the top contestants of the MLCAD 2023 contest, experimental results 
 show that our algorithm achieves the best overall score and routability.
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