Presentation
Designing an ASIC for the Generative AI Era
DescriptionThe presentation will cover what is required to design an ASIC for the Generative AI Era. It will cover the compute, networking, and memory constraints of generative AI as well as what companies are doing to push beyond it with optics, packaging, and system level design.
Event Type
Analyst Presentation
TimeTuesday, June 2510:15am - 11:00am PDT
LocationDAC Pavilion, Level 2 Exhibit Hall