Presentation
Execution Sequence Optimization for Processing In-Memory using Parallel Data Preparation
DescriptionComputation using Processing in-memory (PIM) is performed by breaking down computationally expensive operations into in-memory kernels that can be efficiently executed using non-volatile memory. Logic styles such as MAGIC requires that each output memory cell is prepared for evaluation before executing the functional logic operation. State-of-the-art synthesis algorithms perform the preparation immediately after memory cells have expired. Unfortunately, this results in that columns of cells are prepared one-by-one, instead of leveraging efficient parallel data preparation instructions. In this paper, we propose the PREP framework that maximizes the opportunities for parallel column preparation using execution sequence optimization.
Event Type
Research Manuscript
TimeThursday, June 273:15pm - 3:30pm PDT
Location3003, 3rd Floor
Design
In-memory and Near-memory Computing Circuits