Presentation
LVF2: A Statistical Timing Model based on Gaussian Mixture for Yield Estimation and Speed Binning
DescriptionAs transistor size continues to scale down, process variation has become an essential factor determining semiconductor yield and economic return. The Liberty Variation Format (LVF) is the current industrial standard that expresses statistical timing behaviors based on single Gaussian model. However, it loses accuracy when the timing distribution is non-Gaussian due to growing process variations. This paper proposes a novel LVF2 distribution model to better capture the multi-Gaussian timing distribution while maintaining backward compatibility with LVF. The experiment using TSMC 22nm technology shows that compare to LVF, LVF2 reduces binning error of 7.74× in delay and 9.56× in transition, and reduces 3𝜎-yield error of 4.79× in delay and 7.18× in transition. The error reduction is reduced for path delay due to Central Limit Theorem (CLT). But it is still 2× for a typical circuit path with 8 times Fanout-of-4 (FO4) inverter delays.
Event Type
Research Manuscript
TimeTuesday, June 2511:45am - 12:00pm PDT
Location3008, 3rd Floor
EDA
Timing and Power Analysis and Optimization