Presentation
RTGA: A Redundancy-free Accelerator for High-Performance Temporal Graph Neural Network Inference
DescriptionTemporal Graph Neural Network (TGNN) has attracted much research attention because it can capture dynamic nature of complex networks. However, existing software/hardware solutions suffer from and redundant computation overhead and excessive off-chip communications for TGNN due to they
need to recompute identical messages and unnecessarily updates the vertex memory of unaffected vertices. This paper proposes a redundancy-free accelerator, RTGA, for highperformance
TGNN inference. Specifically, RTGA proposes a redundancy-aware execution approach with temporal tree into novel accelerator design to effectively eliminate unnecessary data processing for fewer redundant computations and off-chip communications, and also designs a temporal-aware data caching method to improve data locality for TGNN. We have implemented and evaluated RTGA on a Xilinx Alveo
U280 FPGA card. Compared with the state-of-the-art software solutions (i.e., TGN and TGL) and hardware solutions (i.e., BlockGNN and FlowGNN), RTGA improves the performance of TGNN inference by an average of 473.2x, 87.4x, 8.2x, and 6.9x and saves energy by 542.8x, 102.2x, 9.4x, and
8.3x, respectively.
need to recompute identical messages and unnecessarily updates the vertex memory of unaffected vertices. This paper proposes a redundancy-free accelerator, RTGA, for highperformance
TGNN inference. Specifically, RTGA proposes a redundancy-aware execution approach with temporal tree into novel accelerator design to effectively eliminate unnecessary data processing for fewer redundant computations and off-chip communications, and also designs a temporal-aware data caching method to improve data locality for TGNN. We have implemented and evaluated RTGA on a Xilinx Alveo
U280 FPGA card. Compared with the state-of-the-art software solutions (i.e., TGN and TGL) and hardware solutions (i.e., BlockGNN and FlowGNN), RTGA improves the performance of TGNN inference by an average of 473.2x, 87.4x, 8.2x, and 6.9x and saves energy by 542.8x, 102.2x, 9.4x, and
8.3x, respectively.
Event Type
Research Manuscript
TimeTuesday, June 2511:45am - 12:00pm PDT
Location3003, 3rd Floor
AI
Design
AI/ML Architecture Design