Presentation
Flash – An Overlooked Technology in VLSI Design
DescriptionIn the semiconductor industry, floating gate (flash) transistors have exclusively been used for non-volatile memory such as USB memory and solid-state drives (SSDs). This tutorial will present work on circuit design and design automation approaches demonstrating that flash can be used to design high-quality general-purpose VLSI ICs, both digital and analog. In particular, we will cover:
A) Flash-based realizations of both digital [2-9] and secure digital [1] ICs. These realizations have shown significantly improved power, delay and area compared to CMOS standard-cell based designs. The approaches in [2-7] use a PLA-based design flow. In contrast, [8-9] utilize a standard-cell based design approach augmented with flash cells, thereby leveraging many decades of EDA development in the standard-cell based design flow. The approach of [1] provides significant security against foundry-based reverse engineering, without a penalty in power, delay or area compared to CMOS designs. In all these approaches, we have developed logic synthesis flows to automate the insertion of flash-based cells in the design.
B) Flash-based realizations of analog circuits such as low-dropout voltage regulators [10-11], Digital-to-Analog converters [13], FIR filters [12], and other DSP engines. Many benefits are availed by using flash-based designs for these [12-13] circuits, including reduced area, power, energy. In [10-11], flash-based design enables the use of the same design to achieve several LDO specifications, thereby resulting in a significant saving in manufacturing costs.
C) Flash-based mixed-signal designs such as convolutional neural network accelerators (both analog [14-16] and digital [17] variants), and other flash-based in-memory computing designs [18]. With flash-based mixed-signal current-mode CNN realizations [14-16], several common CNN architectures can be realized on the same die, resulting in 50X lower energy, and a latency improvement of 15X to 490,000X over [17], which is a state-of-the-art BNN.
A common theme of the above designs is that flash-based designs demonstrate several advantages over conventional CMOS designs, such as performance tunability, the ability to counteract circuit aging due to effects such as NBTI, the control of speed binning, and the ability to mitigate the effects of process variations. For secure designs, we show that if an adversary illegally gains possession of the IC, our approach can allow the functionality of a "kill switch", whereby the circuit operator can erase the flash transistors in the secure design, rendering it non-functional. We further demonstrate that scalability in the 3rd dimension can be leveraged for all these designs, using emerging 3D NAND and NOR flash technologies that are widely available for flash memory applications. Even though flash transistors do not scale to the feature sizes of traditional CMOS designs, we show that by using 3D flash fabrication techniques, a similar chip-level density (compared to traditional CMOS designs) in terms of transistors/area can be achieved.
Based on our findings, we posit that the programmability, robustness, stability, and maturity of flash give it a significant edge to CMOS in many ways, making it a practical alternative to CMOS in many applications.
A) Flash-based realizations of both digital [2-9] and secure digital [1] ICs. These realizations have shown significantly improved power, delay and area compared to CMOS standard-cell based designs. The approaches in [2-7] use a PLA-based design flow. In contrast, [8-9] utilize a standard-cell based design approach augmented with flash cells, thereby leveraging many decades of EDA development in the standard-cell based design flow. The approach of [1] provides significant security against foundry-based reverse engineering, without a penalty in power, delay or area compared to CMOS designs. In all these approaches, we have developed logic synthesis flows to automate the insertion of flash-based cells in the design.
B) Flash-based realizations of analog circuits such as low-dropout voltage regulators [10-11], Digital-to-Analog converters [13], FIR filters [12], and other DSP engines. Many benefits are availed by using flash-based designs for these [12-13] circuits, including reduced area, power, energy. In [10-11], flash-based design enables the use of the same design to achieve several LDO specifications, thereby resulting in a significant saving in manufacturing costs.
C) Flash-based mixed-signal designs such as convolutional neural network accelerators (both analog [14-16] and digital [17] variants), and other flash-based in-memory computing designs [18]. With flash-based mixed-signal current-mode CNN realizations [14-16], several common CNN architectures can be realized on the same die, resulting in 50X lower energy, and a latency improvement of 15X to 490,000X over [17], which is a state-of-the-art BNN.
A common theme of the above designs is that flash-based designs demonstrate several advantages over conventional CMOS designs, such as performance tunability, the ability to counteract circuit aging due to effects such as NBTI, the control of speed binning, and the ability to mitigate the effects of process variations. For secure designs, we show that if an adversary illegally gains possession of the IC, our approach can allow the functionality of a "kill switch", whereby the circuit operator can erase the flash transistors in the secure design, rendering it non-functional. We further demonstrate that scalability in the 3rd dimension can be leveraged for all these designs, using emerging 3D NAND and NOR flash technologies that are widely available for flash memory applications. Even though flash transistors do not scale to the feature sizes of traditional CMOS designs, we show that by using 3D flash fabrication techniques, a similar chip-level density (compared to traditional CMOS designs) in terms of transistors/area can be achieved.
Based on our findings, we posit that the programmability, robustness, stability, and maturity of flash give it a significant edge to CMOS in many ways, making it a practical alternative to CMOS in many applications.
Event Type
Tutorial
TimeMonday, June 2410:30am - 12:00pm PDT
Location3002, 3rd Floor
Design