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Presenter

Evangeline Young
The Chinese University of Hong Kong
Presentations
Research Manuscript
GCS-Timer: GPU-Accelerated Current Source Model Based Static Timing Analysis
EDA
Timing and Power Analysis and Optimization
Research Manuscript
Massively Parallel AIG Resubstitution
EDA
RTL/Logic Level and High-level Synthesis
Research Manuscript
Size-Optimized Depth-Constrained Large Parallel Prefix Circuits
EDA
RTL/Logic Level and High-level Synthesis
Chair of Sessions
Research Manuscript
HLS & Emerging Techniques for Synthesis
EDA
RTL/Logic Level and High-level Synthesis