Presentation
TRIFP-DCIM: A Toggle-Rate-Immune Floating-point Digital Compute-in-Memory Design with Adaptive-Asymmetric Compute-Tree
DescriptionFloating-point compute-in-memory (FP-CIM) is regarded as an attractive approach to enhance the energy efficiency for complex neural networks. Digital domain compute mechanism has been widely utilized in CIM designs owing to its high robust to PVT variations. However, the energy consumption of digital CIM is significantly influenced by the toggle rate of compute-tree. In this work, a toggle-rate immune floating-point digital CIM (TRIFP-DCIM) design is proposed with 34.03% compute energy reduction in average. Combined with the TRIFP-DCIM design, a toggle-rate gathering method is employed in the neural network training/inference process with almost no accuracy loss. Experiment results show that the TRIFP-DCIM can achieve 14.51-36.83 TFLOPS/W@BF16 in 28nm technology process.
Event Type
Work-in-Progress Poster
TimeTuesday, June 256:00pm - 7:00pm PDT
LocationLevel 2 Lobby
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