Presentation
CAP: A General Purpose Computation-in-memory with Content Addressable Processing Paradigm
DescriptionDemands for efficient computing under memory wall have led to computation-in-memory (CIM) accelerators that leverages memory structure to perform in-situ computing. The content addressable memory (CAM) processing is a CIM paradigm that accomplishes general purpose functions, via sequences of search and update op- eration. However, the conventional CAM-based CIM is customized for inter-vector operation and require long search-update iterations for computing.
To mitigate the drawback of prior works, this work proposes a content addressable processor (CAP), improving both of the func- tionality and performance. CAP supports general purpose inter- vector and intra-vector operation. Respectively, CAP shortens the search and update step latency. The sequence order of search-update pair is released by CAP to achieve parallel search-update. CAP is implemented in 22nm CMOS technology with 0.6 mm2 area. By integrating all the techniques, CAP achieves 2.68 x performance improvement over the baseline, also realizes 11.37 TOPs/W energy efficiency and 1.376 TOP/mm2 area efficiency.
To mitigate the drawback of prior works, this work proposes a content addressable processor (CAP), improving both of the func- tionality and performance. CAP supports general purpose inter- vector and intra-vector operation. Respectively, CAP shortens the search and update step latency. The sequence order of search-update pair is released by CAP to achieve parallel search-update. CAP is implemented in 22nm CMOS technology with 0.6 mm2 area. By integrating all the techniques, CAP achieves 2.68 x performance improvement over the baseline, also realizes 11.37 TOPs/W energy efficiency and 1.376 TOP/mm2 area efficiency.
Event Type
Research Manuscript
TimeTuesday, June 254:30pm - 4:45pm PDT
Location3003, 3rd Floor
Design
In-memory and Near-memory Computing Circuits