Presentation
MCU-Wide Timing Side Channels and Their Detection
DescriptionMicroarchitectural timing side-channels are known to compromise security in computing systems with shared buffers (like caches) and/or parallel execution of attacker and victim tasks. Counterintuitively, such threats exist even in simple microcontrollers lacking such features. This paper describes previously neglected SoC-wide timing side-channels and presents a new formal method for detection. In a case study on Pulpissimo, our method detected a vulnerability to a previously unknown attack variant that allows an attacker to obtain information about a victim's memory accesses. We applied a conservative fix and verified security of the SoC against the considered class of timing side-channels.
Event Type
Research Manuscript
TimeThursday, June 2710:30am - 10:48am PDT
Location3008, 3rd Floor
Security
Hardware Security: Primitives, Architecture, Design & Test