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SHERLOCK: Scheduling Efficient and Reliable Bulk Bitwise Operations in NVMs
DescriptionBulk bitwise operations are commonplace in application domains such as databases, web search, cryptography, and image processing.
The ever-growing volume of data and processing demands of these domains often result in high energy consumption and latency in conventional systems, mainly due to extensive data movement.
Non-volatile memory (NVM) technologies, such as RRAM, PCM and STT-MRAM, facilitate conducting bulk-bitwise logic operations in-memory (CIM), eliminating the data movement.
However, mapping complex real-world applications to these CIM-capable NVMs is non-trivial and can lead to sub-optimal performance. To address this, we present SHERLOCK, a novel mapping and scheduling method tailored to exploit the unique characteristics of these systems. SHERLOCK collaboratively optimizes reliability and performance, a previously overlooked aspect that significantly affects both the correctness and throughput of these systems. Our method also leverages the granularity of CIM operations to reduce the number of write operations and, hence, energy consumption. Our evaluation on three representative applications from different domains shows that SHERLOCK outperforms the state-of-the-art in terms of performance and energy consumption.
Event Type
Research Manuscript
TimeWednesday, June 2611:15am - 11:30am PDT
Location3003, 3rd Floor
Topics
Design
Keywords
In-memory and Near-memory Computing Architectures, Applications and Systems