Presentation
Improving the Efficiency of In-Memory-Computing Macro with a Hybrid Analog-Digital Computing Mode for Lossless Neural Network Inference
DescriptionAnalog in-memory-computing (IMC) is an attractive technique with a higher energy efficiency to process machine learning workloads.
However, the analog computing scheme suffers from large interface circuit overhead.
In this work, we propose a macro with a hybrid analog-digital mode computation to reduce the precision requirement of the interface circuit.
Considering the distribution of the multiplication and accumulation (MAC) value, we propose a nonlinear transfer function of the computing circuits by only accurately computing low MAC value in the analog domain, with a digital mode to deal with the high MAC value with smaller possibility.
Silicon measurement results show that the proposed macro could achieve 160 GOPS/mm^2 area efficiency and 25.5 TOPS/W for 8b/8b matrix computation.
The architectural-level evaluation for real workloads shows that the proposed macro can achieve up to 2.92x higher energy efficiency than conventional analog IMC designs.
However, the analog computing scheme suffers from large interface circuit overhead.
In this work, we propose a macro with a hybrid analog-digital mode computation to reduce the precision requirement of the interface circuit.
Considering the distribution of the multiplication and accumulation (MAC) value, we propose a nonlinear transfer function of the computing circuits by only accurately computing low MAC value in the analog domain, with a digital mode to deal with the high MAC value with smaller possibility.
Silicon measurement results show that the proposed macro could achieve 160 GOPS/mm^2 area efficiency and 25.5 TOPS/W for 8b/8b matrix computation.
The architectural-level evaluation for real workloads shows that the proposed macro can achieve up to 2.92x higher energy efficiency than conventional analog IMC designs.
Event Type
Research Manuscript
TimeTuesday, June 254:00pm - 4:15pm PDT
Location3003, 3rd Floor
Design
In-memory and Near-memory Computing Circuits