Presentation
LUTMUL: A Paradigm Shift from DSPs to LUTs for Efficient Multiplication in FPGA-Based Neural Network Computation
DescriptionFor FPGA-based neural network accelerators, digital signal processing (DSP) blocks have traditionally been the cornerstone for handling multiplications. This paper introduces LUTMUL, a transformative approach that harnesses the potential of look-up tables (LUTs) for performing these multiplications. Empirical analysis reveals that the availability of LUTs typically outnumbers DSPs by a factor of 100, offering a significant computational advantage. By exploiting this advantage of LUTs, our method demonstrates a potential boost in the performance of FPGA-based neural network computations together with a reconfigurable data-flow architecture. Our approach not only challenges the conventional compute bound on DSP-based accelerators but also sets a new benchmark for efficient neural network computation on FPGAs. Experimental results demonstrate that our design achieves the best inference speed among all FPGA-based accelerators, achieving a throughput of 1627 images per second and maintaining a top-1 accuracy of 70.95\% on the ImageNet dataset. Our method showcases great scalability, efficiency, and superior performance, marking a paradigm shift in FPGA-based neural network design and optimization.
Event Type
Work-in-Progress Poster
TimeWednesday, June 265:00pm - 6:00pm PDT
LocationLevel 2 Lobby
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