Presentation
RISC-V Instruction Set Extensions for Multi-Precision Integer Arithmetic
DescriptionArithmetic operations on multi-precision integers (MPI) are a performance-critical component of many public-key cryptosystems, including not only classical RSA and ECC, but also post-quantum isogeny-based schemes. In this paper, we analyze and compare two different MPI representations, namely full-radix versus reduced-radix, for efficient modular arithmetic implementations on 64-bit RISC-V (i.e., RV64GC). We then explore how the execution time can be further improved by designing Instruction Set Extensions (ISEs). The ISE we propose can accelerate a CSIDH-512 class group action by a factor of 1.71 compared to an ISA-only implementation on a 64-bit Rocket core. The hardware overhead introduced by our ISE is approximately 10%.
Event Type
Research Manuscript
TimeThursday, June 2711:42am - 12:00pm PDT
Location3008, 3rd Floor
Security
Hardware Security: Primitives, Architecture, Design & Test