Presentation
Towards Cost-Effective High-Throughput End Station Design for Time-Sensitive Networking (TSN)
SessionGetting Real in Real-Time
DescriptionTime-Sensitive Networking (TSN) technology has been increasingly deployed in mission- and safety-critical industrial applications to achieve high throughput and deterministic communications. To provide stringent timing guarantee, TSN requires that network devices follow a predefined communication schedule for real-time end-to-end packet processing, involving both TSN bridges and end stations. Extensive efforts have been devoted on the TSN bridge design in the literature. Achieving TSN compatibility on the end stations (especially on Commercial Off-The-Shelf (COTS) hardware), however is challenging due to the inefficiencies of general CPU and unpredictable bus contention. To fill this gap, this work presents a software-based open-source approach that i) enables nanosecond-level packet transmission accuracy based on DPDK, and ii) employs a novel multi-core scheduling algorithm to boost the throughput of real-time TSN traffic. Our proposed solution leverages existing COTS hardware and thus is more generic and cost-effective compared to existing hardware-centric solutions. We validate our design by developing a prototype end station and incorporating it within an eight-bridge TSN network testbed. Our extensive experiments demonstrate the efficiency and effectiveness of our design at both device and system levels.
Event Type
Research Manuscript
TimeTuesday, June 2511:45am - 12:00pm PDT
Location3012, 3rd Floor
Embedded Systems
Time-Critical and Fault-Tolerant System Design