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Organization

Hong Kong University of Science and Technology
Contributors
Afzal Ahmad
Chen Chen
Kwang-Ting Cheng
Tim Cheng
Tim Kwang-Ting CHENG
Pingcheng Dong
Linfeng Du
Hanwei FAN
Yuxiang Fu
Jingyu HE
Jingyu He
Guangyu Hu
Xijie Huang
Yucong Huang
Tingyuan Liang
Shang Liu
Shi-Yang Liu
Yinyi Liu
Yonghao Tan
Fengshi TIAN
Chi Ying Tsui
Fengbin Tu
Fengbin TU
Xiaomeng WANG
Ya Wang
Yongkun Wu
Zhiyao Xie
Hao Yang
Dong Zhang
Hongce Zhang
Jiaxu Zhang
Wei Zhang
Wei Zhang
Jiakun ZHENG
Presentations
Research Manuscript
Accel-NASBench: Sustainable Benchmarking for Accelerator-Aware NAS
AI
AI/ML Application and Infrastructure
Work-in-Progress Poster
AdaP-CIM: Compute-in-Memory Based Neural Network Accelerator using Adaptive Posit and Speculative Alignment
AI
Autonomous Systems
Cloud
Design
EDA
Embedded Systems
IP
Security
Work-in-Progress Poster
Additive Partial Sum Quantization
AI
Autonomous Systems
Cloud
Design
EDA
Embedded Systems
IP
Security
Research Manuscript
Annotating Slack Directly on Your Verilog: Fine-Grained RTL Timing Evaluation for Early Optimization
EDA
Timing and Power Analysis and Optimization
Research Manuscript
E-Syn: E-Graph Rewriting with Technology-Aware Cost Functions for Logic Synthesis
EDA
RTL/Logic Level and High-level Synthesis
Work-in-Progress Poster
ELF: Efficient Logic Synthesis by Pruning Redundancy in Refactoring
AI
Autonomous Systems
Cloud
Design
EDA
Embedded Systems
IP
Security
Work-in-Progress Poster
ESFA: An Efficient Scalable FFT Accelerator Design Framework on Versal AI Engine
AI
Autonomous Systems
Cloud
Design
EDA
Embedded Systems
IP
Security
Research Manuscript
Explainable Fuzzy Neural Network with Multi-Fidelity Reinforcement Learning for Micro-Architecture Design Space Exploration
EDA
Design Methodologies for System-on-Chip and 3D/2.5D System-in-Package
Research Manuscript
Genetic Quantization-Aware Approximation for Non-Linear Operations in Transformers
AI
AI/ML Algorithms
Work-in-Progress Poster
PINN-based Compact Model for On-chip Silicon Photonic Devices
AI
Autonomous Systems
Cloud
Design
EDA
Embedded Systems
IP
Security
Work-in-Progress Poster
ReS-CIM: ReRAM-cached SRAM Compute-in-Memory Architecture with a Differential Sensing Scheme Enabling Intra-Macro Weight Loading
AI
Autonomous Systems
Cloud
Design
EDA
Embedded Systems
IP
Security
Research Manuscript
RWriC: A Dynamic Writing Scheme for Variation Compensation for RRAM-based In-Memory Computing
Design
In-memory and Near-memory Computing Architectures, Applications and Systems