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Organization

Yonsei University
Contributors
Sungwoo Ahn
Junwoong An
HoSun Choi
Insu Choi
Seungwoo Choi
Bumsub Ham
Enhyeok Jang
Wonjoon Jo
Jinhyo Jung
Seong-Ook Jung
Cheolhwan Kim
Dohyung Kim
Euijun Kim
Giseok Kim
Yebon Kim
Youngmin Kim
Woobin Ko
Yohan Ko
Jaewon Kwon
Dongin Lee
Jiwon Lee
Kyoungwoo Lee
Yanghee Lee
Yongju Lee
Jaehyeon Moon
Chanho Park
Sungho Park
Won Woo Ro
Dongjin Shin
William Song
Joon-Sung Yang
Presentations
Work-in-Progress Poster
An instant leafcell layout auto-generator for area compact memory design automation
AI
Autonomous Systems
Cloud
Design
EDA
Embedded Systems
IP
Security
Work-in-Progress Poster
Efficient Prediction of SRAM Read Access Time and Yield via Neural Network Leveraging Transfer Learning and Transformer Models
AI
Autonomous Systems
Cloud
Design
EDA
Embedded Systems
IP
Security
Research Manuscript
Geneva: A Dynamic Confluence of Speculative Execution and In-Order Commitment Windows
Design
SoC, Heterogeneous, and Reconfigurable Architectures
Work-in-Progress Poster
Libra: Collaborating with Basis-Inverted Circuits to Mitigate State-Dependent Errors on NISQ Programs
AI
Autonomous Systems
Cloud
Design
EDA
Embedded Systems
IP
Security
Research Manuscript
Maintaining Sanity: Algorithm-based Comprehensive Fault Tolerance for CNNs
Embedded Systems
Time-Critical and Fault-Tolerant System Design
Research Manuscript
Nona: Accurate Power Prediction Model Using Neural Networks
EDA
Timing and Power Analysis and Optimization
Work-in-Progress Poster
PIANIST: Efficient Quantum Circuit Simulation using Commercial Processing-in-Memory System
AI
Autonomous Systems
Cloud
Design
EDA
Embedded Systems
IP
Security
Work-in-Progress Poster
Retract: Logarithmic-Depth Reconstruction of Continuous Controlled-NOT Logic Block
AI
Autonomous Systems
Cloud
Design
EDA
Embedded Systems
IP
Security
Research Manuscript
ViT-slice: End-to-end Vision Transformer Accelerator with Bit-slice Algorithm
AI
Design
AI/ML Architecture Design