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Analysis of Rare Failure Events: An Improved Scaled-Sigma Sampling Method
DescriptionHigh sigma analysis is an important topic in circuit design and analysis area, which predicts the probability of rare circuit/device failure events in VLSI circuits, such as in SRAM arrays. There are EDA start-ups specifically dedicated to address rare failure event problems, such as Solido, MunEDA, etc. The importance sampling, the tail sampling methods, etc. have been used in this area for many years. More recently, the Scaled Sigma Sampling (SSS) method by Prof. X. Li, et al. at Carnegie Mellon advanced the analysis of rare failure events greatly. The SSS method is an extrapolation method. The EDA industry has welcomed the SSS method. However, we have not seen a comparison of the SSS method against a set of known and exact failure probabilities. Without such a benchmark comparison, the validity range and the expected accuracy of the SSS method are not very clear. In this work, we wish to fill this gap. In this work, we also present an improved SSS method.
Event Type
Engineering Track Poster
TimeTuesday, June 255:48pm - 5:49pm PDT
LocationLevel 2 Exhibit Hall
Topics
Back-End Design
Embedded Systems
Front-End Design
IP