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An All-Digital IP for Fast Correction of Time-skew Mismatch in Time-Interleaved Analog to Digital Converters for Communication Receivers
DescriptionA new time-skew mismatch correction IP with lowest known convergence time has been developed for a TI-ADC (Time-Interleaved Analog to Digital Converter) for a communications receiver system. The proposed design greatly relieves the communication link budget by significantly reducing time-skew estimation and correction by at least two orders of magnitude. The proposed non-iterative calibration technique is purely deterministic, uses contemporary signal processing blocks and is not based on any correlational or statistical approaches. Numerical simulation results demonstrate a significant improvement in the TI-ADC performance with the proposed calibration method. In next generation 5G/6G, Radar & Space communication domains, the low latency of the proposed TI-ADC will enable applications where response time needed is fast. As the correction converges at a very fast rate, time-skew changes due to rapid temperature changes will be tracked and compensated.
Event Type
IP
TimeMonday, June 242:30pm - 2:45pm PDT
Location2012, 2nd Floor
Topics
Engineering Tracks
IP