Presentation
Mixed-Cell-Height Detailed Placement under Multi-Cell Spacing Constraints
DescriptionAs technology scales down, multi-cell spacing constraints are imposed by modern circuit designs. In this paper, we propose a detailed placement algorithm considering multi-cell spacing constraints. First, an SAT-based multi-cell spacing violation reduction method is presented to reduce the number of violations with minimum displacement. Then, a window-based violation-eliminating method is adopted to resolve all the remaining violations. Finally, we refine the placement result with ILP to reduce the cell displacement. Compared with the state-of-the-art work, experimental results show that our algorithm achieves a 19\% improvement in displacement and a 39\% reduction in runtime.
Event Type
Late Breaking Results Poster
TimeWednesday, June 266:00pm - 7:00pm PDT
LocationLevel 2 Lobby